Static Timing Analysis

Project : TAC_PSOC5
Build Time : 09/18/15 17:58:15
Device : CY8C5868AXI-LP035
Temperature : -40C - 85/125C
VDDA : 5.00
VDDABUF : 5.00
VDDD : 5.00
VDDIO0 : 5.00
VDDIO1 : 5.00
VDDIO2 : 5.00
VDDIO3 : 5.00
VUSB : 5.00
Voltage : 5.0
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+ Timing Violation Section
No Timing Violations
+ Clock Summary Section
Clock Domain Nominal Frequency Required Frequency Maximum Frequency Violation
ADC_TURBIDO_theACLK(fixed-function) ADC_TURBIDO_theACLK(fixed-function) 1.846 MHz 1.846 MHz N/A
ADC_theACLK(routed) ADC_theACLK(routed) 8.000 MHz 8.000 MHz N/A
ClockTurbido(routed) ClockTurbido(routed) 150.000 kHz 150.000 kHz N/A
CyBUS_CLK(fixed-function) CyBUS_CLK(fixed-function) 24.000 MHz 24.000 MHz N/A
CyILO CyILO 100.000 kHz 100.000 kHz N/A
CyIMO CyIMO 24.000 MHz 24.000 MHz N/A
CyMASTER_CLK CyMASTER_CLK 24.000 MHz 24.000 MHz N/A
CyBUS_CLK CyMASTER_CLK 24.000 MHz 24.000 MHz N/A
ADC_theACLK CyMASTER_CLK 8.000 MHz 8.000 MHz N/A
ADC_TURBIDO_theACLK CyMASTER_CLK 1.846 MHz 1.846 MHz N/A
ClockTurbido CyMASTER_CLK 150.000 kHz 150.000 kHz 117.426 MHz
timer_clock_1 CyMASTER_CLK 20.000 kHz 20.000 kHz 78.052 MHz
timer_clock_2 CyMASTER_CLK 10.000 kHz 10.000 kHz 66.037 MHz
CyPLL_OUT CyPLL_OUT 48.000 MHz 48.000 MHz N/A
+ Register to Register Section
+ Setup Subsection
Path Delay Requirement : 6666.67ns(150 kHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
Net_138/q Net_138/main_1 117.426 MHz 8.516 6658.151
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell37 U(0,2) 1 Net_138 Net_138/clock_0 Net_138/q 1.250
macrocell37 U(0,2) 1 Net_138 Net_138/q Net_138/main_1 3.756
macrocell37 U(0,2) 1 Net_138 SETUP 3.510
Clock Skew 0.000
\FreqDiv_1:count_3\/q \FreqDiv_1:count_2\/main_4 132.100 MHz 7.570 6659.097
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell41 U(0,2) 1 \FreqDiv_1:count_3\ \FreqDiv_1:count_3\/clock_0 \FreqDiv_1:count_3\/q 1.250
Route 1 \FreqDiv_1:count_3\ \FreqDiv_1:count_3\/q \FreqDiv_1:count_2\/main_4 2.810
macrocell42 U(0,2) 1 \FreqDiv_1:count_2\ SETUP 3.510
Clock Skew 0.000
\FreqDiv_1:count_1\/q Net_138/main_7 132.293 MHz 7.559 6659.108
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell43 U(0,2) 1 \FreqDiv_1:count_1\ \FreqDiv_1:count_1\/clock_0 \FreqDiv_1:count_1\/q 1.250
Route 1 \FreqDiv_1:count_1\ \FreqDiv_1:count_1\/q Net_138/main_7 2.799
macrocell37 U(0,2) 1 Net_138 SETUP 3.510
Clock Skew 0.000
\FreqDiv_1:count_1\/q \FreqDiv_1:count_6\/main_6 132.293 MHz 7.559 6659.108
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell43 U(0,2) 1 \FreqDiv_1:count_1\ \FreqDiv_1:count_1\/clock_0 \FreqDiv_1:count_1\/q 1.250
Route 1 \FreqDiv_1:count_1\ \FreqDiv_1:count_1\/q \FreqDiv_1:count_6\/main_6 2.799
macrocell38 U(0,2) 1 \FreqDiv_1:count_6\ SETUP 3.510
Clock Skew 0.000
\FreqDiv_1:count_1\/q \FreqDiv_1:count_5\/main_6 132.293 MHz 7.559 6659.108
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell43 U(0,2) 1 \FreqDiv_1:count_1\ \FreqDiv_1:count_1\/clock_0 \FreqDiv_1:count_1\/q 1.250
Route 1 \FreqDiv_1:count_1\ \FreqDiv_1:count_1\/q \FreqDiv_1:count_5\/main_6 2.799
macrocell39 U(0,2) 1 \FreqDiv_1:count_5\ SETUP 3.510
Clock Skew 0.000
\FreqDiv_1:count_1\/q \FreqDiv_1:count_4\/main_3 132.293 MHz 7.559 6659.108
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell43 U(0,2) 1 \FreqDiv_1:count_1\ \FreqDiv_1:count_1\/clock_0 \FreqDiv_1:count_1\/q 1.250
Route 1 \FreqDiv_1:count_1\ \FreqDiv_1:count_1\/q \FreqDiv_1:count_4\/main_3 2.799
macrocell40 U(0,2) 1 \FreqDiv_1:count_4\ SETUP 3.510
Clock Skew 0.000
\FreqDiv_1:count_3\/q Net_138/main_5 132.380 MHz 7.554 6659.113
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell41 U(0,2) 1 \FreqDiv_1:count_3\ \FreqDiv_1:count_3\/clock_0 \FreqDiv_1:count_3\/q 1.250
Route 1 \FreqDiv_1:count_3\ \FreqDiv_1:count_3\/q Net_138/main_5 2.794
macrocell37 U(0,2) 1 Net_138 SETUP 3.510
Clock Skew 0.000
\FreqDiv_1:count_3\/q \FreqDiv_1:count_6\/main_4 132.380 MHz 7.554 6659.113
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell41 U(0,2) 1 \FreqDiv_1:count_3\ \FreqDiv_1:count_3\/clock_0 \FreqDiv_1:count_3\/q 1.250
Route 1 \FreqDiv_1:count_3\ \FreqDiv_1:count_3\/q \FreqDiv_1:count_6\/main_4 2.794
macrocell38 U(0,2) 1 \FreqDiv_1:count_6\ SETUP 3.510
Clock Skew 0.000
\FreqDiv_1:count_3\/q \FreqDiv_1:count_5\/main_4 132.380 MHz 7.554 6659.113
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell41 U(0,2) 1 \FreqDiv_1:count_3\ \FreqDiv_1:count_3\/clock_0 \FreqDiv_1:count_3\/q 1.250
Route 1 \FreqDiv_1:count_3\ \FreqDiv_1:count_3\/q \FreqDiv_1:count_5\/main_4 2.794
macrocell39 U(0,2) 1 \FreqDiv_1:count_5\ SETUP 3.510
Clock Skew 0.000
\FreqDiv_1:count_3\/q \FreqDiv_1:count_4\/main_1 132.380 MHz 7.554 6659.113
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell41 U(0,2) 1 \FreqDiv_1:count_3\ \FreqDiv_1:count_3\/clock_0 \FreqDiv_1:count_3\/q 1.250
Route 1 \FreqDiv_1:count_3\ \FreqDiv_1:count_3\/q \FreqDiv_1:count_4\/main_1 2.794
macrocell40 U(0,2) 1 \FreqDiv_1:count_4\ SETUP 3.510
Clock Skew 0.000
Path Delay Requirement : 50000ns(20 kHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
\pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 78.052 MHz 12.812 49987.188
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell4 U(2,3) 1 \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\ \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\/clock \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\/z0_comb 2.290
datapathcell4 U(2,3) 1 \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\ \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 4.462
datapathcell4 U(2,3) 1 \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\ SETUP 6.060
Clock Skew 0.000
\pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmAgitator_1:PWMUDB:genblk8:stsreg\/status_2 83.584 MHz 11.964 49988.036
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell4 U(2,3) 1 \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\ \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\/clock \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\/z0_comb 2.290
Route 1 \pwmAgitator_1:PWMUDB:tc_i\ \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmAgitator_1:PWMUDB:status_2\/main_1 3.504
macrocell5 U(2,3) 1 \pwmAgitator_1:PWMUDB:status_2\ \pwmAgitator_1:PWMUDB:status_2\/main_1 \pwmAgitator_1:PWMUDB:status_2\/q 3.350
Route 1 \pwmAgitator_1:PWMUDB:status_2\ \pwmAgitator_1:PWMUDB:status_2\/q \pwmAgitator_1:PWMUDB:genblk8:stsreg\/status_2 2.320
statusicell4 U(2,3) 1 \pwmAgitator_1:PWMUDB:genblk8:stsreg\ SETUP 0.500
Clock Skew 0.000
\pwmFan_1:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmFan_1:PWMUDB:genblk8:stsreg\/status_2 88.921 MHz 11.246 49988.754
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell3 U(3,4) 1 \pwmFan_1:PWMUDB:sP8:pwmdp:u0\ \pwmFan_1:PWMUDB:sP8:pwmdp:u0\/clock \pwmFan_1:PWMUDB:sP8:pwmdp:u0\/z0_comb 2.290
Route 1 \pwmFan_1:PWMUDB:tc_i\ \pwmFan_1:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmFan_1:PWMUDB:status_2\/main_1 2.791
macrocell3 U(3,4) 1 \pwmFan_1:PWMUDB:status_2\ \pwmFan_1:PWMUDB:status_2\/main_1 \pwmFan_1:PWMUDB:status_2\/q 3.350
Route 1 \pwmFan_1:PWMUDB:status_2\ \pwmFan_1:PWMUDB:status_2\/q \pwmFan_1:PWMUDB:genblk8:stsreg\/status_2 2.315
statusicell3 U(3,4) 1 \pwmFan_1:PWMUDB:genblk8:stsreg\ SETUP 0.500
Clock Skew 0.000
\pwmFan_1:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmFan_1:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 89.750 MHz 11.142 49988.858
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell3 U(3,4) 1 \pwmFan_1:PWMUDB:sP8:pwmdp:u0\ \pwmFan_1:PWMUDB:sP8:pwmdp:u0\/clock \pwmFan_1:PWMUDB:sP8:pwmdp:u0\/z0_comb 2.290
datapathcell3 U(3,4) 1 \pwmFan_1:PWMUDB:sP8:pwmdp:u0\ \pwmFan_1:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmFan_1:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 2.792
datapathcell3 U(3,4) 1 \pwmFan_1:PWMUDB:sP8:pwmdp:u0\ SETUP 6.060
Clock Skew 0.000
\pwmAgitator_2:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmAgitator_2:PWMUDB:genblk8:stsreg\/status_2 90.473 MHz 11.053 49988.947
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell5 U(3,3) 1 \pwmAgitator_2:PWMUDB:sP8:pwmdp:u0\ \pwmAgitator_2:PWMUDB:sP8:pwmdp:u0\/clock \pwmAgitator_2:PWMUDB:sP8:pwmdp:u0\/z0_comb 2.290
Route 1 \pwmAgitator_2:PWMUDB:tc_i\ \pwmAgitator_2:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmAgitator_2:PWMUDB:status_2\/main_1 2.598
macrocell6 U(3,3) 1 \pwmAgitator_2:PWMUDB:status_2\ \pwmAgitator_2:PWMUDB:status_2\/main_1 \pwmAgitator_2:PWMUDB:status_2\/q 3.350
Route 1 \pwmAgitator_2:PWMUDB:status_2\ \pwmAgitator_2:PWMUDB:status_2\/q \pwmAgitator_2:PWMUDB:genblk8:stsreg\/status_2 2.315
statusicell5 U(3,3) 1 \pwmAgitator_2:PWMUDB:genblk8:stsreg\ SETUP 0.500
Clock Skew 0.000
\pwmFan_2:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmFan_2:PWMUDB:genblk8:stsreg\/status_2 90.678 MHz 11.028 49988.972
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell6 U(3,5) 1 \pwmFan_2:PWMUDB:sP8:pwmdp:u0\ \pwmFan_2:PWMUDB:sP8:pwmdp:u0\/clock \pwmFan_2:PWMUDB:sP8:pwmdp:u0\/z0_comb 2.290
Route 1 \pwmFan_2:PWMUDB:tc_i\ \pwmFan_2:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmFan_2:PWMUDB:status_2\/main_1 2.585
macrocell7 U(3,5) 1 \pwmFan_2:PWMUDB:status_2\ \pwmFan_2:PWMUDB:status_2\/main_1 \pwmFan_2:PWMUDB:status_2\/q 3.350
Route 1 \pwmFan_2:PWMUDB:status_2\ \pwmFan_2:PWMUDB:status_2\/q \pwmFan_2:PWMUDB:genblk8:stsreg\/status_2 2.303
statusicell6 U(3,5) 1 \pwmFan_2:PWMUDB:genblk8:stsreg\ SETUP 0.500
Clock Skew 0.000
\pwmAgitator_2:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmAgitator_2:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 91.500 MHz 10.929 49989.071
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell5 U(3,3) 1 \pwmAgitator_2:PWMUDB:sP8:pwmdp:u0\ \pwmAgitator_2:PWMUDB:sP8:pwmdp:u0\/clock \pwmAgitator_2:PWMUDB:sP8:pwmdp:u0\/z0_comb 2.290
datapathcell5 U(3,3) 1 \pwmAgitator_2:PWMUDB:sP8:pwmdp:u0\ \pwmAgitator_2:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmAgitator_2:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 2.579
datapathcell5 U(3,3) 1 \pwmAgitator_2:PWMUDB:sP8:pwmdp:u0\ SETUP 6.060
Clock Skew 0.000
\pwmFan_2:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmFan_2:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 91.500 MHz 10.929 49989.071
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell6 U(3,5) 1 \pwmFan_2:PWMUDB:sP8:pwmdp:u0\ \pwmFan_2:PWMUDB:sP8:pwmdp:u0\/clock \pwmFan_2:PWMUDB:sP8:pwmdp:u0\/z0_comb 2.290
datapathcell6 U(3,5) 1 \pwmFan_2:PWMUDB:sP8:pwmdp:u0\ \pwmFan_2:PWMUDB:sP8:pwmdp:u0\/z0_comb \pwmFan_2:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 2.579
datapathcell6 U(3,5) 1 \pwmFan_2:PWMUDB:sP8:pwmdp:u0\ SETUP 6.060
Clock Skew 0.000
\pwmFan_2:PWMUDB:runmode_enable\/q \pwmFan_2:PWMUDB:genblk8:stsreg\/status_2 93.906 MHz 10.649 49989.351
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell32 U(3,5) 1 \pwmFan_2:PWMUDB:runmode_enable\ \pwmFan_2:PWMUDB:runmode_enable\/clock_0 \pwmFan_2:PWMUDB:runmode_enable\/q 1.250
Route 1 \pwmFan_2:PWMUDB:runmode_enable\ \pwmFan_2:PWMUDB:runmode_enable\/q \pwmFan_2:PWMUDB:status_2\/main_0 3.246
macrocell7 U(3,5) 1 \pwmFan_2:PWMUDB:status_2\ \pwmFan_2:PWMUDB:status_2\/main_0 \pwmFan_2:PWMUDB:status_2\/q 3.350
Route 1 \pwmFan_2:PWMUDB:status_2\ \pwmFan_2:PWMUDB:status_2\/q \pwmFan_2:PWMUDB:genblk8:stsreg\/status_2 2.303
statusicell6 U(3,5) 1 \pwmFan_2:PWMUDB:genblk8:stsreg\ SETUP 0.500
Clock Skew 0.000
\pwmFan_2:PWMUDB:runmode_enable\/q \pwmFan_2:PWMUDB:sP8:pwmdp:u0\/cs_addr_1 94.393 MHz 10.594 49989.406
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell32 U(3,5) 1 \pwmFan_2:PWMUDB:runmode_enable\ \pwmFan_2:PWMUDB:runmode_enable\/clock_0 \pwmFan_2:PWMUDB:runmode_enable\/q 1.250
Route 1 \pwmFan_2:PWMUDB:runmode_enable\ \pwmFan_2:PWMUDB:runmode_enable\/q \pwmFan_2:PWMUDB:sP8:pwmdp:u0\/cs_addr_1 3.284
datapathcell6 U(3,5) 1 \pwmFan_2:PWMUDB:sP8:pwmdp:u0\ SETUP 6.060
Clock Skew 0.000
Path Delay Requirement : 100000ns(10 kHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
\Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/z0_comb \Peltier2_PWM_Ctrl:PWMUDB:genblk8:stsreg\/status_2 66.037 MHz 15.143 99984.857
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/clock \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/z0_comb 2.290
Route 1 \Peltier2_PWM_Ctrl:PWMUDB:tc_i\ \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/z0_comb \Peltier2_PWM_Ctrl:PWMUDB:status_2\/main_1 3.504
macrocell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:status_2\ \Peltier2_PWM_Ctrl:PWMUDB:status_2\/main_1 \Peltier2_PWM_Ctrl:PWMUDB:status_2\/q 3.350
Route 1 \Peltier2_PWM_Ctrl:PWMUDB:status_2\ \Peltier2_PWM_Ctrl:PWMUDB:status_2\/q \Peltier2_PWM_Ctrl:PWMUDB:genblk8:stsreg\/status_2 5.499
statusicell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:genblk8:stsreg\ SETUP 0.500
Clock Skew 0.000
\Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\/q \Peltier2_PWM_Ctrl:PWMUDB:genblk8:stsreg\/status_2 75.781 MHz 13.196 99986.804
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell16 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\ \Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\/clock_0 \Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\/q 1.250
Route 1 \Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\ \Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\/q \Peltier2_PWM_Ctrl:PWMUDB:status_2\/main_0 2.597
macrocell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:status_2\ \Peltier2_PWM_Ctrl:PWMUDB:status_2\/main_0 \Peltier2_PWM_Ctrl:PWMUDB:status_2\/q 3.350
Route 1 \Peltier2_PWM_Ctrl:PWMUDB:status_2\ \Peltier2_PWM_Ctrl:PWMUDB:status_2\/q \Peltier2_PWM_Ctrl:PWMUDB:genblk8:stsreg\/status_2 5.499
statusicell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:genblk8:stsreg\ SETUP 0.500
Clock Skew 0.000
\Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/z0_comb \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 78.052 MHz 12.812 99987.188
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/clock \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/z0_comb 2.290
datapathcell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/z0_comb \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 4.462
datapathcell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ SETUP 6.060
Clock Skew 0.000
\Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/z0_comb \Peltier1_PWM_Ctrl:PWMUDB:genblk8:stsreg\/status_2 90.703 MHz 11.025 99988.975
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/clock \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/z0_comb 2.290
Route 1 \Peltier1_PWM_Ctrl:PWMUDB:tc_i\ \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/z0_comb \Peltier1_PWM_Ctrl:PWMUDB:status_2\/main_1 2.582
macrocell1 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:status_2\ \Peltier1_PWM_Ctrl:PWMUDB:status_2\/main_1 \Peltier1_PWM_Ctrl:PWMUDB:status_2\/q 3.350
Route 1 \Peltier1_PWM_Ctrl:PWMUDB:status_2\ \Peltier1_PWM_Ctrl:PWMUDB:status_2\/q \Peltier1_PWM_Ctrl:PWMUDB:genblk8:stsreg\/status_2 2.303
statusicell1 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:genblk8:stsreg\ SETUP 0.500
Clock Skew 0.000
\Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/z0_comb \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 91.525 MHz 10.926 99989.074
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/clock \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/z0_comb 2.290
datapathcell1 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/z0_comb \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 2.576
datapathcell1 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ SETUP 6.060
Clock Skew 0.000
\Peltier1_PWM_Ctrl:PWMUDB:runmode_enable\/q \Peltier1_PWM_Ctrl:PWMUDB:genblk8:stsreg\/status_2 93.906 MHz 10.649 99989.351
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell12 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:runmode_enable\ \Peltier1_PWM_Ctrl:PWMUDB:runmode_enable\/clock_0 \Peltier1_PWM_Ctrl:PWMUDB:runmode_enable\/q 1.250
Route 1 \Peltier1_PWM_Ctrl:PWMUDB:runmode_enable\ \Peltier1_PWM_Ctrl:PWMUDB:runmode_enable\/q \Peltier1_PWM_Ctrl:PWMUDB:status_2\/main_0 3.246
macrocell1 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:status_2\ \Peltier1_PWM_Ctrl:PWMUDB:status_2\/main_0 \Peltier1_PWM_Ctrl:PWMUDB:status_2\/q 3.350
Route 1 \Peltier1_PWM_Ctrl:PWMUDB:status_2\ \Peltier1_PWM_Ctrl:PWMUDB:status_2\/q \Peltier1_PWM_Ctrl:PWMUDB:genblk8:stsreg\/status_2 2.303
statusicell1 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:genblk8:stsreg\ SETUP 0.500
Clock Skew 0.000
\Peltier1_PWM_Ctrl:PWMUDB:runmode_enable\/q \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cs_addr_1 94.393 MHz 10.594 99989.406
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell12 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:runmode_enable\ \Peltier1_PWM_Ctrl:PWMUDB:runmode_enable\/clock_0 \Peltier1_PWM_Ctrl:PWMUDB:runmode_enable\/q 1.250
Route 1 \Peltier1_PWM_Ctrl:PWMUDB:runmode_enable\ \Peltier1_PWM_Ctrl:PWMUDB:runmode_enable\/q \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cs_addr_1 3.284
datapathcell1 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ SETUP 6.060
Clock Skew 0.000
\Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\/q \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cs_addr_1 100.847 MHz 9.916 99990.084
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell16 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\ \Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\/clock_0 \Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\/q 1.250
Route 1 \Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\ \Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\/q \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cs_addr_1 2.606
datapathcell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ SETUP 6.060
Clock Skew 0.000
\Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb Net_10388/main_1 105.285 MHz 9.498 99990.502
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/clock \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb 2.510
Route 1 \Peltier2_PWM_Ctrl:PWMUDB:cmp1_less\ \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb Net_10388/main_1 3.478
macrocell19 U(2,5) 1 Net_10388 SETUP 3.510
Clock Skew 0.000
\Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb \Peltier2_PWM_Ctrl:PWMUDB:prevCompare1\/main_0 115.929 MHz 8.626 99991.374
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/clock \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb 2.510
Route 1 \Peltier2_PWM_Ctrl:PWMUDB:cmp1_less\ \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb \Peltier2_PWM_Ctrl:PWMUDB:prevCompare1\/main_0 2.606
macrocell17 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:prevCompare1\ SETUP 3.510
Clock Skew 0.000
+ Hold Subsection
Source Destination Slack (ns) Violation
\FreqDiv_1:count_5\/q Net_138/main_3 3.830
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell39 U(0,2) 1 \FreqDiv_1:count_5\ \FreqDiv_1:count_5\/clock_0 \FreqDiv_1:count_5\/q 1.250
Route 1 \FreqDiv_1:count_5\ \FreqDiv_1:count_5\/q Net_138/main_3 2.580
macrocell37 U(0,2) 1 Net_138 HOLD 0.000
Clock Skew 0.000
\FreqDiv_1:count_5\/q \FreqDiv_1:count_6\/main_2 3.830
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell39 U(0,2) 1 \FreqDiv_1:count_5\ \FreqDiv_1:count_5\/clock_0 \FreqDiv_1:count_5\/q 1.250
Route 1 \FreqDiv_1:count_5\ \FreqDiv_1:count_5\/q \FreqDiv_1:count_6\/main_2 2.580
macrocell38 U(0,2) 1 \FreqDiv_1:count_6\ HOLD 0.000
Clock Skew 0.000
\FreqDiv_1:count_5\/q \FreqDiv_1:count_5\/main_2 3.830
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell39 U(0,2) 1 \FreqDiv_1:count_5\ \FreqDiv_1:count_5\/clock_0 \FreqDiv_1:count_5\/q 1.250
macrocell39 U(0,2) 1 \FreqDiv_1:count_5\ \FreqDiv_1:count_5\/q \FreqDiv_1:count_5\/main_2 2.580
macrocell39 U(0,2) 1 \FreqDiv_1:count_5\ HOLD 0.000
Clock Skew 0.000
\FreqDiv_1:count_5\/q \FreqDiv_1:count_2\/main_2 3.836
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell39 U(0,2) 1 \FreqDiv_1:count_5\ \FreqDiv_1:count_5\/clock_0 \FreqDiv_1:count_5\/q 1.250
Route 1 \FreqDiv_1:count_5\ \FreqDiv_1:count_5\/q \FreqDiv_1:count_2\/main_2 2.586
macrocell42 U(0,2) 1 \FreqDiv_1:count_2\ HOLD 0.000
Clock Skew 0.000
\FreqDiv_1:count_2\/q Net_138/main_6 3.855
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell42 U(0,2) 1 \FreqDiv_1:count_2\ \FreqDiv_1:count_2\/clock_0 \FreqDiv_1:count_2\/q 1.250
Route 1 \FreqDiv_1:count_2\ \FreqDiv_1:count_2\/q Net_138/main_6 2.605
macrocell37 U(0,2) 1 Net_138 HOLD 0.000
Clock Skew 0.000
\FreqDiv_1:count_2\/q \FreqDiv_1:count_6\/main_5 3.855
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell42 U(0,2) 1 \FreqDiv_1:count_2\ \FreqDiv_1:count_2\/clock_0 \FreqDiv_1:count_2\/q 1.250
Route 1 \FreqDiv_1:count_2\ \FreqDiv_1:count_2\/q \FreqDiv_1:count_6\/main_5 2.605
macrocell38 U(0,2) 1 \FreqDiv_1:count_6\ HOLD 0.000
Clock Skew 0.000
\FreqDiv_1:count_2\/q \FreqDiv_1:count_5\/main_5 3.855
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell42 U(0,2) 1 \FreqDiv_1:count_2\ \FreqDiv_1:count_2\/clock_0 \FreqDiv_1:count_2\/q 1.250
Route 1 \FreqDiv_1:count_2\ \FreqDiv_1:count_2\/q \FreqDiv_1:count_5\/main_5 2.605
macrocell39 U(0,2) 1 \FreqDiv_1:count_5\ HOLD 0.000
Clock Skew 0.000
\FreqDiv_1:count_2\/q \FreqDiv_1:count_4\/main_2 3.855
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell42 U(0,2) 1 \FreqDiv_1:count_2\ \FreqDiv_1:count_2\/clock_0 \FreqDiv_1:count_2\/q 1.250
Route 1 \FreqDiv_1:count_2\ \FreqDiv_1:count_2\/q \FreqDiv_1:count_4\/main_2 2.605
macrocell40 U(0,2) 1 \FreqDiv_1:count_4\ HOLD 0.000
Clock Skew 0.000
\FreqDiv_1:count_2\/q \FreqDiv_1:count_3\/main_1 3.857
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell42 U(0,2) 1 \FreqDiv_1:count_2\ \FreqDiv_1:count_2\/clock_0 \FreqDiv_1:count_2\/q 1.250
Route 1 \FreqDiv_1:count_2\ \FreqDiv_1:count_2\/q \FreqDiv_1:count_3\/main_1 2.607
macrocell41 U(0,2) 1 \FreqDiv_1:count_3\ HOLD 0.000
Clock Skew 0.000
\FreqDiv_1:count_2\/q \FreqDiv_1:count_2\/main_5 3.857
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell42 U(0,2) 1 \FreqDiv_1:count_2\ \FreqDiv_1:count_2\/clock_0 \FreqDiv_1:count_2\/q 1.250
macrocell42 U(0,2) 1 \FreqDiv_1:count_2\ \FreqDiv_1:count_2\/q \FreqDiv_1:count_2\/main_5 2.607
macrocell42 U(0,2) 1 \FreqDiv_1:count_2\ HOLD 0.000
Clock Skew 0.000
Source Destination Slack (ns) Violation
\pwmFan_1:PWMUDB:status_0\/q \pwmFan_1:PWMUDB:genblk8:stsreg\/status_0 1.545
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell22 U(3,4) 1 \pwmFan_1:PWMUDB:status_0\ \pwmFan_1:PWMUDB:status_0\/clock_0 \pwmFan_1:PWMUDB:status_0\/q 1.250
Route 1 \pwmFan_1:PWMUDB:status_0\ \pwmFan_1:PWMUDB:status_0\/q \pwmFan_1:PWMUDB:genblk8:stsreg\/status_0 2.295
statusicell3 U(3,4) 1 \pwmFan_1:PWMUDB:genblk8:stsreg\ HOLD -2.000
Clock Skew 0.000
\pwmFan_2:PWMUDB:status_0\/q \pwmFan_2:PWMUDB:genblk8:stsreg\/status_0 1.545
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell34 U(3,5) 1 \pwmFan_2:PWMUDB:status_0\ \pwmFan_2:PWMUDB:status_0\/clock_0 \pwmFan_2:PWMUDB:status_0\/q 1.250
Route 1 \pwmFan_2:PWMUDB:status_0\ \pwmFan_2:PWMUDB:status_0\/q \pwmFan_2:PWMUDB:genblk8:stsreg\/status_0 2.295
statusicell6 U(3,5) 1 \pwmFan_2:PWMUDB:genblk8:stsreg\ HOLD -2.000
Clock Skew 0.000
\pwmAgitator_2:PWMUDB:status_0\/q \pwmAgitator_2:PWMUDB:genblk8:stsreg\/status_0 1.557
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell30 U(3,3) 1 \pwmAgitator_2:PWMUDB:status_0\ \pwmAgitator_2:PWMUDB:status_0\/clock_0 \pwmAgitator_2:PWMUDB:status_0\/q 1.250
Route 1 \pwmAgitator_2:PWMUDB:status_0\ \pwmAgitator_2:PWMUDB:status_0\/q \pwmAgitator_2:PWMUDB:genblk8:stsreg\/status_0 2.307
statusicell5 U(3,3) 1 \pwmAgitator_2:PWMUDB:genblk8:stsreg\ HOLD -2.000
Clock Skew 0.000
\pwmAgitator_1:PWMUDB:status_0\/q \pwmAgitator_1:PWMUDB:genblk8:stsreg\/status_0 1.580
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell26 U(2,3) 1 \pwmAgitator_1:PWMUDB:status_0\ \pwmAgitator_1:PWMUDB:status_0\/clock_0 \pwmAgitator_1:PWMUDB:status_0\/q 1.250
Route 1 \pwmAgitator_1:PWMUDB:status_0\ \pwmAgitator_1:PWMUDB:status_0\/q \pwmAgitator_1:PWMUDB:genblk8:stsreg\/status_0 2.330
statusicell4 U(2,3) 1 \pwmAgitator_1:PWMUDB:genblk8:stsreg\ HOLD -2.000
Clock Skew 0.000
\pwmAgitator_2:PWMUDB:genblk1:ctrlreg\/control_7 \pwmAgitator_2:PWMUDB:runmode_enable\/main_0 2.674
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell6 U(3,3) 1 \pwmAgitator_2:PWMUDB:genblk1:ctrlreg\ \pwmAgitator_2:PWMUDB:genblk1:ctrlreg\/clock \pwmAgitator_2:PWMUDB:genblk1:ctrlreg\/control_7 0.360
Route 1 \pwmAgitator_2:PWMUDB:control_7\ \pwmAgitator_2:PWMUDB:genblk1:ctrlreg\/control_7 \pwmAgitator_2:PWMUDB:runmode_enable\/main_0 2.314
macrocell28 U(3,3) 1 \pwmAgitator_2:PWMUDB:runmode_enable\ HOLD 0.000
Clock Skew 0.000
\pwmFan_1:PWMUDB:genblk1:ctrlreg\/control_7 \pwmFan_1:PWMUDB:runmode_enable\/main_0 2.683
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(3,4) 1 \pwmFan_1:PWMUDB:genblk1:ctrlreg\ \pwmFan_1:PWMUDB:genblk1:ctrlreg\/clock \pwmFan_1:PWMUDB:genblk1:ctrlreg\/control_7 0.360
Route 1 \pwmFan_1:PWMUDB:control_7\ \pwmFan_1:PWMUDB:genblk1:ctrlreg\/control_7 \pwmFan_1:PWMUDB:runmode_enable\/main_0 2.323
macrocell20 U(3,4) 1 \pwmFan_1:PWMUDB:runmode_enable\ HOLD 0.000
Clock Skew 0.000
\pwmFan_2:PWMUDB:genblk1:ctrlreg\/control_7 \pwmFan_2:PWMUDB:runmode_enable\/main_0 2.683
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell7 U(3,5) 1 \pwmFan_2:PWMUDB:genblk1:ctrlreg\ \pwmFan_2:PWMUDB:genblk1:ctrlreg\/clock \pwmFan_2:PWMUDB:genblk1:ctrlreg\/control_7 0.360
Route 1 \pwmFan_2:PWMUDB:control_7\ \pwmFan_2:PWMUDB:genblk1:ctrlreg\/control_7 \pwmFan_2:PWMUDB:runmode_enable\/main_0 2.323
macrocell32 U(3,5) 1 \pwmFan_2:PWMUDB:runmode_enable\ HOLD 0.000
Clock Skew 0.000
\pwmAgitator_1:PWMUDB:genblk1:ctrlreg\/control_7 \pwmAgitator_1:PWMUDB:runmode_enable\/main_0 2.686
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell5 U(2,3) 1 \pwmAgitator_1:PWMUDB:genblk1:ctrlreg\ \pwmAgitator_1:PWMUDB:genblk1:ctrlreg\/clock \pwmAgitator_1:PWMUDB:genblk1:ctrlreg\/control_7 0.360
Route 1 \pwmAgitator_1:PWMUDB:control_7\ \pwmAgitator_1:PWMUDB:genblk1:ctrlreg\/control_7 \pwmAgitator_1:PWMUDB:runmode_enable\/main_0 2.326
macrocell24 U(2,3) 1 \pwmAgitator_1:PWMUDB:runmode_enable\ HOLD 0.000
Clock Skew 0.000
\pwmFan_2:PWMUDB:sP8:pwmdp:u0\/cl0_comb \pwmFan_2:PWMUDB:status_0\/main_1 3.366
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell6 U(3,5) 1 \pwmFan_2:PWMUDB:sP8:pwmdp:u0\ \pwmFan_2:PWMUDB:sP8:pwmdp:u0\/clock \pwmFan_2:PWMUDB:sP8:pwmdp:u0\/cl0_comb 0.780
Route 1 \pwmFan_2:PWMUDB:cmp1_less\ \pwmFan_2:PWMUDB:sP8:pwmdp:u0\/cl0_comb \pwmFan_2:PWMUDB:status_0\/main_1 2.586
macrocell34 U(3,5) 1 \pwmFan_2:PWMUDB:status_0\ HOLD 0.000
Clock Skew 0.000
\pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\/cl0_comb \pwmAgitator_1:PWMUDB:status_0\/main_1 3.372
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell4 U(2,3) 1 \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\ \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\/clock \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\/cl0_comb 0.780
Route 1 \pwmAgitator_1:PWMUDB:cmp1_less\ \pwmAgitator_1:PWMUDB:sP8:pwmdp:u0\/cl0_comb \pwmAgitator_1:PWMUDB:status_0\/main_1 2.592
macrocell26 U(2,3) 1 \pwmAgitator_1:PWMUDB:status_0\ HOLD 0.000
Clock Skew 0.000
Source Destination Slack (ns) Violation
\Peltier1_PWM_Ctrl:PWMUDB:status_0\/q \Peltier1_PWM_Ctrl:PWMUDB:genblk8:stsreg\/status_0 1.561
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell14 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:status_0\ \Peltier1_PWM_Ctrl:PWMUDB:status_0\/clock_0 \Peltier1_PWM_Ctrl:PWMUDB:status_0\/q 1.250
Route 1 \Peltier1_PWM_Ctrl:PWMUDB:status_0\ \Peltier1_PWM_Ctrl:PWMUDB:status_0\/q \Peltier1_PWM_Ctrl:PWMUDB:genblk8:stsreg\/status_0 2.311
statusicell1 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:genblk8:stsreg\ HOLD -2.000
Clock Skew 0.000
\Peltier2_PWM_Ctrl:PWMUDB:status_0\/q \Peltier2_PWM_Ctrl:PWMUDB:genblk8:stsreg\/status_0 1.573
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell18 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:status_0\ \Peltier2_PWM_Ctrl:PWMUDB:status_0\/clock_0 \Peltier2_PWM_Ctrl:PWMUDB:status_0\/q 1.250
Route 1 \Peltier2_PWM_Ctrl:PWMUDB:status_0\ \Peltier2_PWM_Ctrl:PWMUDB:status_0\/q \Peltier2_PWM_Ctrl:PWMUDB:genblk8:stsreg\/status_0 2.323
statusicell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:genblk8:stsreg\ HOLD -2.000
Clock Skew 0.000
\Peltier2_PWM_Ctrl:PWMUDB:genblk1:ctrlreg\/control_7 \Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\/main_0 2.700
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:genblk1:ctrlreg\ \Peltier2_PWM_Ctrl:PWMUDB:genblk1:ctrlreg\/clock \Peltier2_PWM_Ctrl:PWMUDB:genblk1:ctrlreg\/control_7 0.360
Route 1 \Peltier2_PWM_Ctrl:PWMUDB:control_7\ \Peltier2_PWM_Ctrl:PWMUDB:genblk1:ctrlreg\/control_7 \Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\/main_0 2.340
macrocell16 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:runmode_enable\ HOLD 0.000
Clock Skew 0.000
\Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb \Peltier1_PWM_Ctrl:PWMUDB:prevCompare1\/main_0 3.083
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/clock \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb 0.780
Route 1 \Peltier1_PWM_Ctrl:PWMUDB:cmp1_less\ \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb \Peltier1_PWM_Ctrl:PWMUDB:prevCompare1\/main_0 2.303
macrocell13 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:prevCompare1\ HOLD 0.000
Clock Skew 0.000
\Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb \Peltier1_PWM_Ctrl:PWMUDB:status_0\/main_1 3.083
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/clock \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb 0.780
Route 1 \Peltier1_PWM_Ctrl:PWMUDB:cmp1_less\ \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb \Peltier1_PWM_Ctrl:PWMUDB:status_0\/main_1 2.303
macrocell14 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:status_0\ HOLD 0.000
Clock Skew 0.000
\Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb Net_1702/main_1 3.083
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/clock \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb 0.780
Route 1 \Peltier1_PWM_Ctrl:PWMUDB:cmp1_less\ \Peltier1_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb Net_1702/main_1 2.303
macrocell15 U(1,4) 1 Net_1702 HOLD 0.000
Clock Skew 0.000
\Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb \Peltier2_PWM_Ctrl:PWMUDB:status_0\/main_1 3.378
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/clock \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb 0.780
Route 1 \Peltier2_PWM_Ctrl:PWMUDB:cmp1_less\ \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb \Peltier2_PWM_Ctrl:PWMUDB:status_0\/main_1 2.598
macrocell18 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:status_0\ HOLD 0.000
Clock Skew 0.000
\Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb \Peltier2_PWM_Ctrl:PWMUDB:prevCompare1\/main_0 3.386
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\ \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/clock \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb 0.780
Route 1 \Peltier2_PWM_Ctrl:PWMUDB:cmp1_less\ \Peltier2_PWM_Ctrl:PWMUDB:sP8:pwmdp:u0\/cl0_comb \Peltier2_PWM_Ctrl:PWMUDB:prevCompare1\/main_0 2.606
macrocell17 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:prevCompare1\ HOLD 0.000
Clock Skew 0.000
\Peltier1_PWM_Ctrl:PWMUDB:prevCompare1\/q \Peltier1_PWM_Ctrl:PWMUDB:status_0\/main_0 3.545
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell13 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:prevCompare1\ \Peltier1_PWM_Ctrl:PWMUDB:prevCompare1\/clock_0 \Peltier1_PWM_Ctrl:PWMUDB:prevCompare1\/q 1.250
Route 1 \Peltier1_PWM_Ctrl:PWMUDB:prevCompare1\ \Peltier1_PWM_Ctrl:PWMUDB:prevCompare1\/q \Peltier1_PWM_Ctrl:PWMUDB:status_0\/main_0 2.295
macrocell14 U(1,4) 1 \Peltier1_PWM_Ctrl:PWMUDB:status_0\ HOLD 0.000
Clock Skew 0.000
\Peltier2_PWM_Ctrl:PWMUDB:prevCompare1\/q \Peltier2_PWM_Ctrl:PWMUDB:status_0\/main_0 3.548
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell17 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:prevCompare1\ \Peltier2_PWM_Ctrl:PWMUDB:prevCompare1\/clock_0 \Peltier2_PWM_Ctrl:PWMUDB:prevCompare1\/q 1.250
Route 1 \Peltier2_PWM_Ctrl:PWMUDB:prevCompare1\ \Peltier2_PWM_Ctrl:PWMUDB:prevCompare1\/q \Peltier2_PWM_Ctrl:PWMUDB:status_0\/main_0 2.298
macrocell18 U(2,4) 1 \Peltier2_PWM_Ctrl:PWMUDB:status_0\ HOLD 0.000
Clock Skew 0.000
+ Clock To Output Section
+ ClockTurbido
Source Destination Delay (ns)
Net_138/q diode_out(0)_PAD 25.080
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell37 U(0,2) 1 Net_138 Net_138/clock_0 Net_138/q 1.250
Route 1 Net_138 Net_138/q diode_out(0)/pin_input 7.610
iocell29 P12[6] 1 diode_out(0) diode_out(0)/pin_input diode_out(0)/pad_out 16.220
Route 1 diode_out(0)_PAD diode_out(0)/pad_out diode_out(0)_PAD 0.000
Clock Clock path delay 0.000
+ CyBUS_CLK
Source Destination Delay (ns)
\Peltier1_Ctrl:Sync:ctrl_reg\/control_0 PELTIER1_Cool(0)_PAD 30.141
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell4 U(0,4) 1 \Peltier1_Ctrl:Sync:ctrl_reg\ \Peltier1_Ctrl:Sync:ctrl_reg\/busclk \Peltier1_Ctrl:Sync:ctrl_reg\/control_0 2.050
Route 1 Net_10144 \Peltier1_Ctrl:Sync:ctrl_reg\/control_0 Net_9885/main_1 2.325
macrocell8 U(0,4) 1 Net_9885 Net_9885/main_1 Net_9885/q 3.350
Route 1 Net_9885 Net_9885/q PELTIER1_Cool(0)/pin_input 6.491
iocell5 P15[5] 1 PELTIER1_Cool(0) PELTIER1_Cool(0)/pin_input PELTIER1_Cool(0)/pad_out 15.925
Route 1 PELTIER1_Cool(0)_PAD PELTIER1_Cool(0)/pad_out PELTIER1_Cool(0)_PAD 0.000
Clock Clock path delay 0.000
\Peltier2_Ctrl:Sync:ctrl_reg\/control_0 PELTIER2_Cool(0)_PAD 29.777
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell9 U(2,5) 1 \Peltier2_Ctrl:Sync:ctrl_reg\ \Peltier2_Ctrl:Sync:ctrl_reg\/busclk \Peltier2_Ctrl:Sync:ctrl_reg\/control_0 2.050
Route 1 Net_10371 \Peltier2_Ctrl:Sync:ctrl_reg\/control_0 Net_10392/main_1 2.299
macrocell9 U(2,5) 1 Net_10392 Net_10392/main_1 Net_10392/q 3.350
Route 1 Net_10392 Net_10392/q PELTIER2_Cool(0)/pin_input 7.198
iocell26 P6[1] 1 PELTIER2_Cool(0) PELTIER2_Cool(0)/pin_input PELTIER2_Cool(0)/pad_out 14.880
Route 1 PELTIER2_Cool(0)_PAD PELTIER2_Cool(0)/pad_out PELTIER2_Cool(0)_PAD 0.000
Clock Clock path delay 0.000
\Peltier1_Ctrl:Sync:ctrl_reg\/control_1 PELTIER1_Heat(0)_PAD 29.398
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell4 U(0,4) 1 \Peltier1_Ctrl:Sync:ctrl_reg\ \Peltier1_Ctrl:Sync:ctrl_reg\/busclk \Peltier1_Ctrl:Sync:ctrl_reg\/control_1 2.050
Route 1 Net_10170 \Peltier1_Ctrl:Sync:ctrl_reg\/control_1 Net_10209/main_1 2.310
macrocell4 U(0,4) 1 Net_10209 Net_10209/main_1 Net_10209/q 3.350
Route 1 Net_10209 Net_10209/q PELTIER1_Heat(0)/pin_input 6.677
iocell4 P6[3] 1 PELTIER1_Heat(0) PELTIER1_Heat(0)/pin_input PELTIER1_Heat(0)/pad_out 15.011
Route 1 PELTIER1_Heat(0)_PAD PELTIER1_Heat(0)/pad_out PELTIER1_Heat(0)_PAD 0.000
Clock Clock path delay 0.000
\Peltier2_Ctrl:Sync:ctrl_reg\/control_1 PELTIER2_Heat(0)_PAD 29.175
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell9 U(2,5) 1 \Peltier2_Ctrl:Sync:ctrl_reg\ \Peltier2_Ctrl:Sync:ctrl_reg\/busclk \Peltier2_Ctrl:Sync:ctrl_reg\/control_1 2.050
Route 1 Net_10407 \Peltier2_Ctrl:Sync:ctrl_reg\/control_1 Net_10391/main_1 2.310
macrocell10 U(2,5) 1 Net_10391 Net_10391/main_1 Net_10391/q 3.350
Route 1 Net_10391 Net_10391/q PELTIER2_Heat(0)/pin_input 5.489
iocell25 P4[6] 1 PELTIER2_Heat(0) PELTIER2_Heat(0)/pin_input PELTIER2_Heat(0)/pad_out 15.976
Route 1 PELTIER2_Heat(0)_PAD PELTIER2_Heat(0)/pad_out PELTIER2_Heat(0)_PAD 0.000
Clock Clock path delay 0.000
\Peltier_Enable:Sync:ctrl_reg\/control_1 Peltier2_Enable_2(0)_PAD 24.624
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell8 U(1,4) 1 \Peltier_Enable:Sync:ctrl_reg\ \Peltier_Enable:Sync:ctrl_reg\/busclk \Peltier_Enable:Sync:ctrl_reg\/control_1 2.050
Route 1 Net_9373 \Peltier_Enable:Sync:ctrl_reg\/control_1 Peltier2_Enable_2(0)/pin_input 7.352
iocell24 P4[7] 1 Peltier2_Enable_2(0) Peltier2_Enable_2(0)/pin_input Peltier2_Enable_2(0)/pad_out 15.222
Route 1 Peltier2_Enable_2(0)_PAD Peltier2_Enable_2(0)/pad_out Peltier2_Enable_2(0)_PAD 0.000
Clock Clock path delay 0.000
\Peltier_Enable:Sync:ctrl_reg\/control_0 Peltier1_Enable_2(0)_PAD 24.067
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell8 U(1,4) 1 \Peltier_Enable:Sync:ctrl_reg\ \Peltier_Enable:Sync:ctrl_reg\/busclk \Peltier_Enable:Sync:ctrl_reg\/control_0 2.050
Route 1 Net_9371 \Peltier_Enable:Sync:ctrl_reg\/control_0 Peltier1_Enable_2(0)/pin_input 6.169
iocell22 P15[4] 1 Peltier1_Enable_2(0) Peltier1_Enable_2(0)/pin_input Peltier1_Enable_2(0)/pad_out 15.848
Route 1 Peltier1_Enable_2(0)_PAD Peltier1_Enable_2(0)/pad_out Peltier1_Enable_2(0)_PAD 0.000
Clock Clock path delay 0.000
\Peltier_Enable:Sync:ctrl_reg\/control_0 Peltier1_Enable_1(0)_PAD 23.946
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell8 U(1,4) 1 \Peltier_Enable:Sync:ctrl_reg\ \Peltier_Enable:Sync:ctrl_reg\/busclk \Peltier_Enable:Sync:ctrl_reg\/control_0 2.050
Route 1 Net_9371 \Peltier_Enable:Sync:ctrl_reg\/control_0 Peltier1_Enable_1(0)/pin_input 6.150
iocell21 P6[2] 1 Peltier1_Enable_1(0) Peltier1_Enable_1(0)/pin_input Peltier1_Enable_1(0)/pad_out 15.746
Route 1 Peltier1_Enable_1(0)_PAD Peltier1_Enable_1(0)/pad_out Peltier1_Enable_1(0)_PAD 0.000
Clock Clock path delay 0.000
\Peltier_Enable:Sync:ctrl_reg\/control_1 Peltier2_Enable_1(0)_PAD 23.522
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell8 U(1,4) 1 \Peltier_Enable:Sync:ctrl_reg\ \Peltier_Enable:Sync:ctrl_reg\/busclk \Peltier_Enable:Sync:ctrl_reg\/control_1 2.050
Route 1 Net_9373 \Peltier_Enable:Sync:ctrl_reg\/control_1 Peltier2_Enable_1(0)/pin_input 6.558
iocell23 P6[0] 1 Peltier2_Enable_1(0) Peltier2_Enable_1(0)/pin_input Peltier2_Enable_1(0)/pad_out 14.914
Route 1 Peltier2_Enable_1(0)_PAD Peltier2_Enable_1(0)/pad_out Peltier2_Enable_1(0)_PAD 0.000
Clock Clock path delay 0.000
+ CyBUS_CLK(fixed-function)
Source Destination Delay (ns)
\CAN_1:CanIP\/can_tx_en Can_Enable(0)_PAD 19.407
Type Location Fanout Instance/Net Source Dest Delay (ns)
cancell F(CAN,0) 1 \CAN_1:CanIP\ \CAN_1:CanIP\/clock \CAN_1:CanIP\/can_tx_en 1.000
Route 1 Net_10762 \CAN_1:CanIP\/can_tx_en Can_Enable(0)/pin_input 2.937
iocell13 P1[2] 1 Can_Enable(0) Can_Enable(0)/pin_input Can_Enable(0)/pad_out 15.470
Route 1 Can_Enable(0)_PAD Can_Enable(0)/pad_out Can_Enable(0)_PAD 0.000
Clock Clock path delay 0.000
+ timer_clock_1
Source Destination Delay (ns)
Net_6293/q outputAgitator2(0)_PAD 23.102
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell31 U(3,3) 1 Net_6293 Net_6293/clock_0 Net_6293/q 1.250
Route 1 Net_6293 Net_6293/q outputAgitator2(0)/pin_input 6.357
iocell16 P0[7] 1 outputAgitator2(0) outputAgitator2(0)/pin_input outputAgitator2(0)/pad_out 15.495
Route 1 outputAgitator2(0)_PAD outputAgitator2(0)/pad_out outputAgitator2(0)_PAD 0.000
Clock Clock path delay 0.000
Net_1600/q outputAgitator1(0)_PAD 22.743
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell27 U(2,3) 1 Net_1600 Net_1600/clock_0 Net_1600/q 1.250
Route 1 Net_1600 Net_1600/q outputAgitator1(0)/pin_input 6.470
iocell6 P0[5] 1 outputAgitator1(0) outputAgitator1(0)/pin_input outputAgitator1(0)/pad_out 15.023
Route 1 outputAgitator1(0)_PAD outputAgitator1(0)/pad_out outputAgitator1(0)_PAD 0.000
Clock Clock path delay 0.000
Net_3597/q fanPeltier1(0)_PAD 22.686
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell23 U(3,5) 1 Net_3597 Net_3597/clock_0 Net_3597/q 1.250
Route 1 Net_3597 Net_3597/q fanPeltier1(0)/pin_input 6.343
iocell10 P4[3] 1 fanPeltier1(0) fanPeltier1(0)/pin_input fanPeltier1(0)/pad_out 15.093
Route 1 fanPeltier1(0)_PAD fanPeltier1(0)/pad_out fanPeltier1(0)_PAD 0.000
Clock Clock path delay 0.000
Net_6281/q fanPeltier2(0)_PAD 22.066
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell35 U(3,5) 1 Net_6281 Net_6281/clock_0 Net_6281/q 1.250
Route 1 Net_6281 Net_6281/q fanPeltier2(0)/pin_input 5.469
iocell15 P4[5] 1 fanPeltier2(0) fanPeltier2(0)/pin_input fanPeltier2(0)/pad_out 15.347
Route 1 fanPeltier2(0)_PAD fanPeltier2(0)/pad_out fanPeltier2(0)_PAD 0.000
Clock Clock path delay 0.000
+ timer_clock_2
Source Destination Delay (ns)
Net_1702/q PELTIER1_Cool(0)_PAD 29.598
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell15 U(1,4) 1 Net_1702 Net_1702/clock_0 Net_1702/q 1.250
Route 1 Net_1702 Net_1702/q Net_9885/main_0 2.582
macrocell8 U(0,4) 1 Net_9885 Net_9885/main_0 Net_9885/q 3.350
Route 1 Net_9885 Net_9885/q PELTIER1_Cool(0)/pin_input 6.491
iocell5 P15[5] 1 PELTIER1_Cool(0) PELTIER1_Cool(0)/pin_input PELTIER1_Cool(0)/pad_out 15.925
Route 1 PELTIER1_Cool(0)_PAD PELTIER1_Cool(0)/pad_out PELTIER1_Cool(0)_PAD 0.000
Clock Clock path delay 0.000
Net_10388/q PELTIER2_Cool(0)_PAD 28.976
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell19 U(2,5) 1 Net_10388 Net_10388/clock_0 Net_10388/q 1.250
Route 1 Net_10388 Net_10388/q Net_10392/main_0 2.298
macrocell9 U(2,5) 1 Net_10392 Net_10392/main_0 Net_10392/q 3.350
Route 1 Net_10392 Net_10392/q PELTIER2_Cool(0)/pin_input 7.198
iocell26 P6[1] 1 PELTIER2_Cool(0) PELTIER2_Cool(0)/pin_input PELTIER2_Cool(0)/pad_out 14.880
Route 1 PELTIER2_Cool(0)_PAD PELTIER2_Cool(0)/pad_out PELTIER2_Cool(0)_PAD 0.000
Clock Clock path delay 0.000
Net_1702/q PELTIER1_Heat(0)_PAD 28.869
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell15 U(1,4) 1 Net_1702 Net_1702/clock_0 Net_1702/q 1.250
Route 1 Net_1702 Net_1702/q Net_10209/main_0 2.581
macrocell4 U(0,4) 1 Net_10209 Net_10209/main_0 Net_10209/q 3.350
Route 1 Net_10209 Net_10209/q PELTIER1_Heat(0)/pin_input 6.677
iocell4 P6[3] 1 PELTIER1_Heat(0) PELTIER1_Heat(0)/pin_input PELTIER1_Heat(0)/pad_out 15.011
Route 1 PELTIER1_Heat(0)_PAD PELTIER1_Heat(0)/pad_out PELTIER1_Heat(0)_PAD 0.000
Clock Clock path delay 0.000
Net_10388/q PELTIER2_Heat(0)_PAD 28.363
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell19 U(2,5) 1 Net_10388 Net_10388/clock_0 Net_10388/q 1.250
Route 1 Net_10388 Net_10388/q Net_10391/main_0 2.298
macrocell10 U(2,5) 1 Net_10391 Net_10391/main_0 Net_10391/q 3.350
Route 1 Net_10391 Net_10391/q PELTIER2_Heat(0)/pin_input 5.489
iocell25 P4[6] 1 PELTIER2_Heat(0) PELTIER2_Heat(0)/pin_input PELTIER2_Heat(0)/pad_out 15.976
Route 1 PELTIER2_Heat(0)_PAD PELTIER2_Heat(0)/pad_out PELTIER2_Heat(0)_PAD 0.000
Clock Clock path delay 0.000